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Mazdak & Alborz design automation tries to fill the
gaps in the ESL design flow by using SystemC language. We
provide solutions for the following needs.
:: A dedicated design environment for SystemC
language.
SystemC as a new emerging language provides software,
hardware and system level design capability by using
well-known C++ language. SystemC is a software language
equipped with hardware and system design features. A true
design environment for SystemC should provide all of the
software, hardware and system level design features in an
integrated environment. Evan is our answer to this
requirement. Evan provides traditional software design
environment features along with required features for
hardware and system level designs.
:: Reusing Verilog IP cores in SystemC design
environment.
SystemC, introduced as a next-generation system-level
design language, models both hardware and software
modules. It simulates the entire system in a unified
language and environment, which highly accelerates system
verification and presents designer an executable system
model. But what to do with currently available IP cores?
Most of them are in traditional HDLs such as Verilog.
Should they all be designed from scratch again in SystemC?
V2SC answers this question by bridging the gap between
Verilog design environment and SystemC one.
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